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Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process
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Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process
Sarangi, Santunu
URI:
http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/12746
Date:
2022-12
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Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process
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