IDR Home
→
2. Ph.D Theses of IIT Kharagpur
→
Electronics & Electrical Communication Engineering
→
Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process
→
Browsing Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process by Author

Browsing Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process by Author

Now showing items 1-1 of 1

Authors Name
Sarangi, Santunu [1]

Now showing items 1-1 of 1

Search DSpace

Advanced Search

Browse

All of DSpace
This Collection
- By Issue Date
- Authors
- Titles
- Subjects

My Account

Login