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Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip
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Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip
Manna, Kanchan
URI:
http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/6182
Date:
2016-02
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Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip
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