Please use this identifier to cite or link to this item: http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/11549
Title: Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness
Authors: Kumar, Ajit
Keywords: Subthreshold model
Threshold voltage
Junctionless FETs
Double gate
Gate all around
Issue Date: Jun-2021
Publisher: IIT Kharagpur
Gov't Doc #: NB17061
URI: http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/11549
Appears in Collections:Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness

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