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Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness Collection home page

Author: Ajit Kumar
Supervisor: Prof. J. N. Roy
Advanced Technology Development Centre
Indian Institute of Technology Kharagpur, India
June, 2021

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Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1
Issue DateTitleAuthor(s)
2021-06Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide ThicknessKumar, Ajit
Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1

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