IDR - IIT Kharagpur
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2. Ph.D Theses of IIT Kharagpur
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Electronics & Electrical Communication Engineering
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Design and Development of Jitter Measurement Circuit for High-Speed SerDes System using 65 nm CMOS Process
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65 nm CMOS Process (1)
High-Speed System Design (1)
Jitter Measurement Circuit (1)
Phase-Locked Loops (1)
Serdes System (1)
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