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http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/3907| Title: | Performance Enhancement of a Pipeline Analog-to-Digital Converter Through Topological Modification of Building Blocks |
| Authors: | Roy, Sounak |
| Keywords: | Digital Calibration of Pipeline ADC Digital Error Correction Bottom Plate Sampling Double Sampling Time Interleaving Pipeline ADC |
| Issue Date: | 26-Jun-2015 |
| Gov't Doc #: | NB15051 |
| URI: | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/3907 |
| Appears in Collections: | Performance Enhancement of a Pipeline Analog-to-Digital Converter Through Topological Modification of Building Blocks |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| NB15051_Abstract.pdf | 34.89 kB | Adobe PDF |  View/Open | |
| NB15051_Thesis.pdf Restricted Access | 3.76 MB | Adobe PDF | View/Open Request a copy |
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