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http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/11577| Title: | Algorithms and Architectures for Structured Low Density Parity Check Codes |
| Authors: | Shantharam, Kalipatnapu |
| Keywords: | Low Density Parity Check (LDPC) Codes Binary compressed sensing Low complexity VLSI Architecture Bit flipping decoder Non-Binary LDPC |
| Issue Date: | Feb-2020 |
| Publisher: | IIT Kharagpur |
| Gov't Doc #: | NB17075 |
| URI: | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/11577 |
| Appears in Collections: | Algorithms and Architectures for Structured Low Density Parity Check Codes |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| NB17075_Abstract.pdf | 13.29 kB | Adobe PDF | View/Open | |
| NB17075_Thesis.pdf Restricted Access | 1.46 MB | Adobe PDF | View/Open Request a copy |
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