IDR - IIT Kharagpur

Hardware-Efficient VLSI Architectures and Algorithms For The HEVC Standard

Hardware-Efficient VLSI Architectures and Algorithms For The HEVC Standard

 

Author: Ashish Singhadia
Supervisor: Prof. Indrajit Chakrabarti
Department of Electronics and Electrical Communication Engineering
Indian Institute of Technology Kharagpur, India
February, 2022

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