IDR - IIT Kharagpur

Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness

Subthreshold Modeling of Asymmetric Multi Gate Junctionless FETs with Scaled Equivalent Oxide Thickness

 

Author: Ajit Kumar
Supervisor: Prof. J. N. Roy
Advanced Technology Development Centre
Indian Institute of Technology Kharagpur, India
June, 2021

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