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  4. Modelling of Josephson Logics and Memories for a Supercomputer
Please use this identifier to cite or link to this item: http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/9298
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dc.contributor.authorSrinivas, Kurapati-
dc.date.accessioned2018-07-18T10:48:11Z-
dc.date.available2018-07-18T10:48:11Z-
dc.date.issued1989-08-01-
dc.identifier.govdocNB11567-
dc.identifier.urihttp://www.idr.iitkgp.ac.in/xmlui/handle/123456789/9298-
dc.language.isoenen
dc.publisherIIT, Kharagpuren
dc.subjectSuperconductivityen
dc.subjectSuperconducting Striplineen
dc.subjectJosephson Logicsen
dc.subjectJosephson Memoriesen
dc.subjectLogicsen
dc.titleModelling of Josephson Logics and Memories for a Supercomputeren
dc.typeThesisen
Appears in Collections:Modelling of Josephson Logics and Memories for a Supercomputer

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