Please use this identifier to cite or link to this item:
http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/8136
Title: | Design-for-Test Techniques for SOC Designs |
Authors: | Rao, C. V. Guru |
Keywords: | Design-For-Test Systematic Methodology High Fault Coverage Soc Designs System-Level |
Issue Date: | 1-Oct-2003 |
Publisher: | IIT, Kharagpur |
Gov't Doc #: | NB13122 |
URI: | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/8136 |
Appears in Collections: | Design-for-Test Techniques for SOC Designs |
Files in This Item:
File | Description | Size | Format | |
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NB13122_Abstract.pdf | 147.99 kB | Adobe PDF | ![]() View/Open | |
NB13122_Thesis.pdf Restricted Access | 6.22 MB | Adobe PDF | View/Open Request a copy |
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