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http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7712| Title: | Synthesis of Testable VLSI Designs from High Level Specifications |
| Authors: | Mitra, Biswadip |
| Keywords: | VLSI Designs Technology Mapping State Assignment Synthesis for Testability Synthesis |
| Issue Date: | 1-Jan-1992 |
| Publisher: | IIT, Kharagpur |
| Gov't Doc #: | NB11773 ; NB11636 |
| URI: | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7712 |
| Appears in Collections: | Synthesis of Testable VLSI Designs from High Level Specifications |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| NB11773_Abstract.pdf | 134.57 kB | Adobe PDF |  View/Open | |
| NB11773_Thesis.pdf Restricted Access | 15.34 MB | Adobe PDF | View/Open Request a copy |
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