Please use this identifier to cite or link to this item:
http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7712
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Mitra, Biswadip | |
dc.date.accessioned | 2017-07-10T09:28:08Z | |
dc.date.available | 2017-07-10T09:28:08Z | |
dc.date.issued | 1992-01-01 | |
dc.identifier.govdoc | NB11773 ; NB11636 | |
dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7712 | |
dc.language.iso | en | en |
dc.publisher | IIT, Kharagpur | en |
dc.subject | VLSI Designs | en |
dc.subject | Technology Mapping | en |
dc.subject | State Assignment | en |
dc.subject | Synthesis for Testability | en |
dc.subject | Synthesis | en |
dc.title | Synthesis of Testable VLSI Designs from High Level Specifications | en |
dc.type | Thesis | en |
Appears in Collections: | Synthesis of Testable VLSI Designs from High Level Specifications |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
NB11773_Abstract.pdf | 134.57 kB | Adobe PDF | ![]() View/Open | |
NB11773_Thesis.pdf Restricted Access | 15.34 MB | Adobe PDF | View/Open Request a copy |
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