VLSI Architectures for High Throughput Turbo Decoder and Reduced Complexity Turbo Equalizer Collection home page

Author : Shaikh Montajul Karim
Guide : Dr. Indrajit Chakrabarti
Department of Electronics and Electrical Communication Engineering Indian Institute of Technology, Kharagpur, June 2012

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Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1
Issue DateTitleAuthor(s)
2012-06VLSI Architectures for High Throughput Turbo Decoder and Reduced Complexity Turbo EqualizerKarim, Shaikh Montajul
Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1

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