Low Power Logic Optimization and Synthesis Collection home page

Author: Saurabh Chaudhury
Supervisor: Prof. Santanu Chattopadhyay
Department of Electronics and Electrical Communication Engineering
Indian Institute of Technology Kharagpur, India
2009

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Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1
Issue DateTitleAuthor(s)
2009Low Power Logic Optimization and SynthesisChaudhury, Saurabuh
Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1