IDR Home
→
2. Ph.D Theses of IIT Kharagpur
→
Electronics & Electrical Communication Engineering
→
A Class of Pipelined Architectures to Realize High Speed Adaptive Equalizers
→
Browsing A Class of Pipelined Architectures to Realize High Speed Adaptive Equalizers by Issue Date

Browsing A Class of Pipelined Architectures to Realize High Speed Adaptive Equalizers by Issue Date

Now showing items 1-1 of 1

A Class of Pipelined Architectures to Realize High Speed Adaptive Equalizers

Pervin, Suraiya (IIT, Kharagpur, 2001-12-01)

Now showing items 1-1 of 1

Search DSpace

Advanced Search

Browse

All of DSpace
This Collection
- By Issue Date
- Authors
- Titles
- Subjects

My Account

Login