IDR - IIT Kharagpur

High Speed VLSI CORDIC Architectures

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dc.contributor.author Lakshmi, B.
dc.date.accessioned 2010-09-08T06:43:14Z
dc.date.available 2010-09-08T06:43:14Z
dc.date.issued 2010
dc.identifier.govdoc NB14236
dc.identifier.uri http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/709
dc.description.abstract COordinate Rotation DIgital Computer (CORDIC) algorithm is an iterative met- hod for fast hardware implementation of vector rotations. en
dc.language.iso en en
dc.publisher IIT Kharagpur en
dc.subject VLSI en
dc.title High Speed VLSI CORDIC Architectures en
dc.type Thesis en


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