IDR Home
→
2. Ph.D Theses of IIT Kharagpur
→
Electronics & Electrical Communication Engineering
→
Genetic Algorithm based Logic Optimization and Synthesis Techniques with Area-Power Trade-offs
→
Browsing Genetic Algorithm based Logic Optimization and Synthesis Techniques with Area-Power Trade-offs by Subject

Browsing Genetic Algorithm based Logic Optimization and Synthesis Techniques with Area-Power Trade-offs by Subject

Now showing items 1-3 of 3

Subject
FSM decomposition [1]
Genetic Algorithm [1]
Multiplexer synthesis [1]

Now showing items 1-3 of 3

Search DSpace

Advanced Search

Browse

All of DSpace
This Collection
- By Issue Date
- Authors
- Titles
- Subjects

My Account

Login