Improved Test Techniques for Network-on-Chip Based Memory Systems

dc.contributor.author	Ghoshal, Bibhas
dc.date.accessioned	2015-09-23T04:48:04Z
dc.date.available	2015-09-23T04:48:04Z
dc.date.issued	2014-07
dc.identifier.govdoc	NB15125
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/5073
dc.language.iso	en	en
dc.publisher	IIT Kharagpur	en
dc.subject	FIFO Buffer	en
dc.subject	DRAM Operation	en
dc.subject	SRAM Operation	en
dc.subject	Memory BIST	en
dc.subject	Network-on-Chip	en
dc.title	Improved Test Techniques for Network-on-Chip Based Memory Systems	en
dc.type	Thesis	en