Sampled Analog Architectures For Real Time Signal Processing

dc.contributor.author	Mal, Ashis Kumar
dc.date.accessioned	2010-03-10T05:42:10Z
dc.date.available	2010-03-10T05:42:10Z
dc.date.issued	2006
dc.identifier.govdoc	NB13875
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/316
dc.language.iso	en	en
dc.publisher	IIT Kharagpur	en
dc.subject	Analog Domain	en
dc.subject	Sampled Data Architectures	en
dc.title	Sampled Analog Architectures For Real Time Signal Processing	en
dc.type	Thesis	en