IDR - IIT Kharagpur

Design and Implementation of High Speed Energy Efficient Transceivers for On-Chip Interconnects

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dc.contributor.author Wary, Nijwm
dc.date.accessioned 2022-06-09T11:41:07Z
dc.date.available 2022-06-09T11:41:07Z
dc.date.issued 2018-03
dc.identifier.govdoc NB16011
dc.identifier.uri http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/11176
dc.language.iso en en_US
dc.publisher IIT Kharagpur en_US
dc.subject On-chip interconnect en_US
dc.subject Global interconnect en_US
dc.subject High speed link en_US
dc.subject Serial commu- nication en_US
dc.subject Network-on-chip en_US
dc.title Design and Implementation of High Speed Energy Efficient Transceivers for On-Chip Interconnects en_US
dc.type Thesis en_US


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