Reliable and Fault Tolerant Network-On-Chip Design

dc.contributor.author	Chatterjee, Navonil
dc.date.accessioned	2021-11-10T14:26:49Z
dc.date.available	2021-11-10T14:26:49Z
dc.date.issued	2018-07
dc.identifier.govdoc	NB16128
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/10136
dc.language.iso	en_US	en_US
dc.publisher	IIT Kharagpur	en_US
dc.subject	Network-on-chip	en_US
dc.subject	Fault tolerance	en_US
dc.subject	Reliability	en_US
dc.subject	Particle swarm optimization	en_US
dc.subject	Mixed integer linear programming	en_US
dc.title	Reliable and Fault Tolerant Network-On-Chip Design	en_US
dc.type	Thesis	en_US