DSpace at My University: Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip

Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip Collection home page

Author : Kanchan Manna
Guide : Prof. Indranil Sengupta and Prof. Santanu Chattopadhyay
Computer Science & Engineering Department
Indian Institute of Technology, Kharagpur
February, 2016

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Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1

Issue Date	Title	Author(s)
2016-02	Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip	Manna, Kanchan

Collection's Items (Sorted by Submit Date in Descending order): 1 to 1 of 1

DSpace JSPUI

DSpace preserves and enables easy and open access to all types of digital content including text, images, moving images, mpegs and data sets

Thermal-Aware Design and Test Techniques for Two- and Three-Dimensional Networks-on-Chip Collection home page

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