Theory and Application of Additive Cellular Automata for Easily Testable VLSI Circuit Design

dc.contributor.author	Mishra, Susanta
dc.date.accessioned	2017-07-11T11:30:41Z
dc.date.available	2017-07-11T11:30:41Z
dc.date.issued	1992-01-01
dc.identifier.govdoc	NB11625
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7736
dc.language.iso	en	en
dc.publisher	IIT, Kharagpur	en
dc.subject	Test Controller	en
dc.subject	Test Scheduling	en
dc.subject	State Assignment	en
dc.subject	Synthesis for Testability	en
dc.subject	Built-In Self Test	en
dc.subject	Pseudo Random Testing	en
dc.subject	Aliasing Errors	en
dc.subject	Signature Analyzer's	en
dc.subject	Additive Cellular Automata	en
dc.subject	Design for Testability	en
dc.title	Theory and Application of Additive Cellular Automata for Easily Testable VLSI Circuit Design	en
dc.type	Thesis	en