Synthesis of Testable VLSI Designs from High Level Specifications

dc.contributor.author	Mitra, Biswadip
dc.date.accessioned	2017-07-10T09:28:08Z
dc.date.available	2017-07-10T09:28:08Z
dc.date.issued	1992-01-01
dc.identifier.govdoc	NB11773 ; NB11636
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7712
dc.language.iso	en	en
dc.publisher	IIT, Kharagpur	en
dc.subject	VLSI Designs	en
dc.subject	Technology Mapping	en
dc.subject	State Assignment	en
dc.subject	Synthesis for Testability	en
dc.subject	Synthesis	en
dc.title	Synthesis of Testable VLSI Designs from High Level Specifications	en
dc.type	Thesis	en