dc.contributor.author | Hati, Manas Kumar | |
dc.date.accessioned | 2017-05-03T11:06:50Z | |
dc.date.available | 2017-05-03T11:06:50Z | |
dc.date.issued | 2017-01-01 | |
dc.identifier.govdoc | NB15692 | |
dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/7516 | |
dc.language.iso | en | en |
dc.publisher | IIT, Kharagpur | en |
dc.subject | Pipeline ADC | en |
dc.subject | Noise Cancellation | en |
dc.subject | Loop Bandwidth Calibration | en |
dc.subject | Delta Sigma Modulator | en |
dc.subject | Frequency Divider | en |
dc.subject | Jitter | en |
dc.subject | Spur | en |
dc.subject | Phase Frequency Detector | en |
dc.subject | Phase-Locked Loop | en |
dc.subject | Charge Pump | en |
dc.subject | Fractional-N PLL | en |
dc.title | Auto Calibrated Delta Sigma Fractional-N PLL Frequency Synthesizer and aWideband Pipeline ADC | en |
dc.type | Thesis | en |