dc.contributor.author | Gorai, Ranjit Kumar | |
dc.date.accessioned | 2015-08-25T11:09:01Z | |
dc.date.available | 2015-08-25T11:09:01Z | |
dc.date.issued | 1991-01 | |
dc.identifier.govdoc | NB11616 | |
dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/4675 | |
dc.language.iso | en | en |
dc.publisher | IIT, Kharagpur | en |
dc.subject | Algorithm | en |
dc.subject | Integrated Circuit | en |
dc.subject | Digital Circuits | en |
dc.subject | Logic Design | en |
dc.subject | Cascade Network | en |
dc.title | Some Studies on Logic Design with Multiplexers and Testing of Digital Circuits | en |
dc.type | Thesis | en |