IDR - IIT Kharagpur

Some Studies on Designing an Efficient Data Flow Computer

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dc.contributor.author Banga, M. Krishnappa
dc.date.accessioned 2015-08-20T07:36:02Z
dc.date.available 2015-08-20T07:36:02Z
dc.date.issued 1991-08
dc.identifier.govdoc NB11600
dc.identifier.uri http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/4642
dc.language.iso en en
dc.publisher IIT, Kharagpur en
dc.subject Parallel Processors en
dc.subject Data Flow Architectures en
dc.subject Composite Structures en
dc.subject Graph Algorithms en
dc.subject Modeling Techniques en
dc.subject Programming Structures en
dc.title Some Studies on Designing an Efficient Data Flow Computer en
dc.type Thesis en


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