Performance Enhancement of a Pipeline Analog-to-Digital Converter Through Topological Modification of Building Blocks

dc.contributor.author	Roy, Sounak
dc.date.accessioned	2015-06-26T11:13:09Z
dc.date.available	2015-06-26T11:13:09Z
dc.date.issued	2015-06-26T11:13:09Z
dc.identifier.govdoc	NB15051
dc.identifier.uri	http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/3907
dc.language.iso	en	en
dc.subject	Digital Calibration of Pipeline ADC	en
dc.subject	Digital Error Correction	en
dc.subject	Bottom Plate Sampling	en
dc.subject	Double Sampling	en
dc.subject	Time Interleaving	en
dc.subject	Pipeline ADC	en
dc.title	Performance Enhancement of a Pipeline Analog-to-Digital Converter Through Topological Modification of Building Blocks	en
dc.type	Thesis	en