| dc.contributor.author | Mandal, Debashis | |
| dc.date.accessioned | 2014-10-08T11:17:32Z | |
| dc.date.available | 2014-10-08T11:17:32Z | |
| dc.date.issued | 2013-06 | |
| dc.identifier.govdoc | NB14803 | |
| dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/2931 | |
| dc.language.iso | en | en |
| dc.publisher | IIT Kharagpur | en |
| dc.subject | Periodic charge distribution | en |
| dc.subject | Phase Locked Loops | en |
| dc.subject | Spur Reducing Architecture | en |
| dc.subject | Pulse repetition technique | en |
| dc.subject | Frequency synthesizer | en |
| dc.subject | System stability | en |
| dc.subject | Voltage controlled oscillator | en |
| dc.subject | Spur Prediction | en |
| dc.subject | Noise Analysis | en |
| dc.subject | Reference spur prediction | en |
| dc.subject | Reference spur reduction | en |
| dc.title | Prediction and Reduction of Reference Spur in a Frequency Synthesizer | en |
| dc.type | Thesis | en |