dc.contributor.author | Chowdhury, Dipanwita Roy | |
dc.date.accessioned | 2014-09-16T10:16:37Z | |
dc.date.available | 2014-09-16T10:16:37Z | |
dc.date.issued | 1992 | |
dc.identifier.govdoc | Nb11742 | |
dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/2670 | |
dc.language.iso | en | en |
dc.publisher | IIT, Kharagpur | en |
dc.subject | All-Unidirectional-Error- Detecting | en |
dc.subject | Single-Error-Correcting | en |
dc.subject | Matrix Algebraic | en |
dc.subject | Pseudo-Random Testing | en |
dc.subject | Built-in-Self Test | en |
dc.subject | Two-dimensional | en |
dc.subject | Pattern Sensitive Faults | en |
dc.subject | BIST | en |
dc.subject | Associative Memory | en |
dc.subject | Cellular Automata | en |
dc.subject | VLSI | en |
dc.subject | Error Correcting Code | en |
dc.subject | Synthesis for Testability | en |
dc.title | Theory and Applications of Additive Cellular Automata for Reliable and Testable VLSI Circuit Design | en |
dc.type | Thesis | en |