| dc.contributor.author | Shadangi, Ashish Ranjan | |
| dc.date.accessioned | 2025-08-05T06:51:51Z | |
| dc.date.available | 2025-08-05T06:51:51Z | |
| dc.date.issued | 2025-06 | |
| dc.identifier.govdoc | NB18818 | |
| dc.identifier.uri | http://127.0.0.1/xmlui/handle/123456789/16361 | |
| dc.language.iso | en | en_US |
| dc.publisher | IIT Kharagpur | en_US |
| dc.subject | Orthogonal Time Frequency Space | en_US |
| dc.subject | Orthogonal Frequency Division Multiplexing | en_US |
| dc.subject | Lower–upper (LU) Decomposition | en_US |
| dc.subject | Minimum Mean Square Equalizer | en_US |
| dc.subject | Very-Large-Scale Integration | en_US |
| dc.title | VLSI Architecture for Orthogonal Time Frequency Space Modulation | en_US |
| dc.type | Thesis | en_US |