dc.contributor.author | Prasad, N | |
dc.date.accessioned | 2022-03-08T07:17:11Z | |
dc.date.available | 2022-03-08T07:17:11Z | |
dc.date.issued | 2018-04 | |
dc.identifier.govdoc | NB16342 | |
dc.identifier.uri | http://www.idr.iitkgp.ac.in/xmlui/handle/123456789/10563 | |
dc.language.iso | en_US | en_US |
dc.publisher | IIT Kharagpur | en_US |
dc.subject | Network-on-chip | en_US |
dc.subject | Energy-efficiency | en_US |
dc.subject | Security analysis | en_US |
dc.subject | Digital signal processing | en_US |
dc.subject | Viterbi decoding | en_US |
dc.title | Energy-Efficient and Secure Network-On-Chip Architectures for Digital Signal Processing Applications | en_US |
dc.type | Thesis | en_US |