Formal Methods for Aiding Verification of Local Design Changes in Digital Integrated Circuits http://127.0.0.1/xmlui/handle/123456789/2078 2026-04-18T00:03:11Z 2026-04-18T00:03:11Z Formal Methods for Aiding Verification of Local Design Changes in Digital Integrated Circuits Mitra, Srobona http://127.0.0.1/xmlui/handle/123456789/2079 2015-06-01T11:03:55Z 2013-06-01T00:00:00Z Formal Methods for Aiding Verification of Local Design Changes in Digital Integrated Circuits Mitra, Srobona 2013-06-01T00:00:00Z